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Welcome to the web page of Dr. H. Haralambous
PhD, BEng(Hons)



AEEC 192 -  Digital Circuits II


In this web space you may find lecture notes and other relevant material for the Fall 2017 semester on Digital Circuits II.

It is highly recommended for students to have the following lecture notes with them in hard copies in each and every lecture. In this respect, notes are provided in portable document format (pdf) and can be downloaded by right-clicking on each link. Not all lecture notes are currently available but they will become available in due time as the course progresses.

The notes provided must not be considered as a replacement of either attendance of lectures or study of the suggested textbooks. Their purpose is to assist you in your studying and provide you with guidelines on what you should be focusing on. You are encouraged to enhance notes with study from the recommended literature and web links.

Subject Information

Course outline

Prerequisite course 





Right click on the following links to save the lecture notes on your PC, then print them.

Week #

Lecture #

Topics covered

Week 1


Sept 26 – Oct 2



Sequential components


Basic Digital Electronic System components

Digital Systems examples.

Basic characteristics of Sequential Circuits





Week 2


Oct 3 – Oct 9

Lecture 1

 Sequential components


Flip-flop triggering.

Flip-flop types (D,JK,T)

Flip-flop characteristic tables





Week 3


Oct 10 – Oct 16

Sequential logic Finite State Machine Design and Analysis Procedure

State diagrams

State equations

State tables


TEST (30/10/2017)

Week 4


Oct 17 – Oct 23

Sequential logic Finite State Machine Design and Analysis Procedure

D type FSM


T type FSM





Week 5


Oct 24 – Oct 30

Sequential logic Finite State Machine Design and Analysis Procedure

Sequence detectors

Parity generators

Sequential addition




Week 6


Oct 31 – Nov 6

Test 1  ()




Week 7


Nov 7 – Nov 13

Lecture 3



Synchronous counters.

Asynchronous counters

Irregular counters



TEST (11/12/2017)

Week 8


Nov 14- Nov 20

Lecture 4



The significance of registers.

The universal register

Register operations





Week 9


Nov 21 – Nov 27

Lecture 5

Algorithmic State Machines


ASM representation

ASM components

ASM examples





Week 10


Nov 28 – Dec 4

Test 2




Week 11


Dec 5 – Dec 11

Lecture 6

Algorithmic State Machines II

Multiplication algorithm implemented in ASM

Register representation

CPU design considerations





Design the control with MUXs and decoder for

Hw6 and Hw7

Week 12


Dec 12 – Dec 18

Algorithmic State Machines II


Control design using one FF per state.

Control design using minimum number of FFs.

Control design using MUXs and decoders.





DESIGN PROJECT  Submit on 8/1/2017

Week 13


Jan9 – Jan 13








According to the Institute’s regulations, 60% of a student’s grade corresponds to the result of his/her final examination. The remaining 40% is the student’s coursework grade, which will be calculated as follows:

Evaluation Type

After completion of


Test 1

Week 5


Test 2

Week 9


Lab report




Lectures will be given in every class session and they will be based on the main textbook. The assignments and examinations will be based on the material covered in class. Students are advised to purchase the main textbook on which many topics of the course are covered. Students are also advised to review the extensive list of books offered at the FIT library on the subject.

Main textbook

  • Morris Mano, Digital Design, Prentice Hall, 2002

Additional reading and other learning recourses

  • P. Ashenden, The Student’s Guide to VHDL, Morgan Kaufmann, 1998
  • David van den Bout, The Practical Xilinx Designers Lab Book, Prentice Hall, 1999
  • John Wakerly, Digital Design: Principles and Practices and Xilinx 4.2i, 3/e, Prentice Hall, 2003